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2021 DAC System Design Contest

  • Contest announcement: January 2021
  • Registration deadline: February 12, 2021 March 1, 2021
  • Preliminary submissions due: Apr, Jun, Aug 2021
  • Final submission due: Sep 15, 2021
  • Finalist teams announced: Oct 1, 2021
  • Award presentation: DAC 2021, July 11-15 Dec 5-9, 2021.
  • April submission deadline: Apr. 30, 2021
  • The results for the April submission have been posted. Note that we slightly changed the scoring method. See details in the Evaluation section.
  • June submission is open now. Deadline: June 30, 2021.
  • [New] The results for the June submission have been posted. Note that we slightly reduced the IoU penalty. Please see details in the Evaluation section.
  • Jeff Goeders - Brigham Young University
  • Callie Hao - Georgia Institute of Technology
  • Cheng Zhuo - Zhejiang University

Each team is required to register at the following link: CLOSED

The 2021 System Design Contest features embedded system implementation of neural network based object detection for drones. Contestants will receive training dataset provided by our industry sponsor DJI, and a hidden dataset will be used to evaluate the performance of the designs in terms of accuracy and power. Contestants will compete to create the best performing design on a Ultra 96 v2 FPGA board. Grand cash awards will be given to the top three teams. The award ceremony will be held at the 2021 IEEE/ACM Design Automation Conference.

Eligibility: The contest is open to both industry and academia.

The 2021 contest will use the Ultra 96 v2 development board.

  • In 2019, we used the Ultra96 v1 board. If you have this board, you may choose to continue to use it instead of purchasing a v2 board (or you may use both for your testing); however, you should be aware of the potential issues.
  • By default, the Ultra96v2 PYNQ image is not set up to measure power. You will need to follow these instructions to set it up.

We are working on a solution to provide teams with development boards. Please check back soon.

Contest Framework

The base design framework is provided here: https://github.com/jgoeders/dac_sdc_2021. This repository contains specifications for how your design should connect to our testing infrastructure.

Training Dataset

Link to download training dataset: https://byu.box.com/s/hdgztcu12j7fij397jmd68h4og6ln1jw

Frequently Asked Questions

Previous Contest Winning Designs

Each team will submit their design once at the end of March, April and May, and results will be preliminary results will be posted each month. This allows you to check that your solutions is working on our evaluation platform. The final submission is due September 15, 2021.

Preliminary submissions, at minimum, should include your notebook (*.ipynb), and hardware files (*.bit, *.hwh). If your design uses other files, they should be included as well.

Requirements:

  1. Follow the example notebook provided: dac_sdc.ipynb
    1. Your notebook must run without error using the “Run All Cells” command in Jupyter.
    2. As shown in the example notebook, you must time all of your processing. You may exclude reading the images from SD card from your runtime, but all other processing must be tracked.
    3. During all tracked processing time, you must record power usage at a rate of 20 times/second (0.05s interval, as shown in the example notebook).
    4. You must use the provided command (team.save_results_xml(result_rectangle, total_time, energy)) to save your results to file.
    5. Do not hardcode any paths. You should use paths such as dac_sdc.IMG_DIR.
    6. Use the provided function (get_image_batch()) to fetch images in batches.
    7. If you are using the v1 board, be sure to fix the power rail names before submission. The rail should be “5V” and the frame “5V_power”.
    8. The notebook should be split into 4 code cells as described in the example notebook.
  2. The provided dac_sdc.py file must not be modified. Do not submit your own version. Leave the sys.path.append(os.path.abspath(“../common”)) statement in the notebook so that the official dac_sdc.py file can be located.
  3. Place all of your files in a single zip archive and submit it.

For the final submission, follow the instructions above. In addition:

  • Submit all source files for your design, in a zip archive.
  • Your design must be available, open-source, and in working condition in order to be considered for an award. You are permitted to use publicly available closed source tools and IP (Xilinx's DPU); however, all of your work (any modifications and configurations to commercial, closed-source tools), must be accessible.

We will be using Piazza as a Q&A platform for the contest. Sign up using this link.

[Update 5/17/2021] We slightly changed the scoring method to encourage more diverse designs. The energy component is now scaled logarithmically as in past year’s competitions. The penalty for FPS is also slightly reduced.

[Update 7/18/2021] We slightly reduced the IoU penalty. Please see the updated scoring formula below.

The evaluation for 2021 has changed: the design is solely evaluated by the total energy consumption if the accuracy and throughput are above the threshold; otherwise, penalties will be applied.

The score for a team is calculated as follows:

Score = 10^2 / log2(Energy) × Max(ReLU([1 - 5 × ReLU(0.7 - IoU)]), 0.1) × ReLU([1 - ReLU(1 - FPS / 30)])

  • FPS (Frame Per Second), measures the throughput.
  • IoU (Intersection over Union), measures the accuracy. A good example of IoU can be found here.
  • The threshold for FPS is 30; the threshold for IoU is 0.7.
  • ReLU is a non-linear function that helps apply the penalty: ReLU(x) = (x > 0) ? x : 0.
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  • Last modified: 2021/07/18 10:11
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